1. Field of the Invention
The present invention relates to a semiconductor device including a capacitor, specifically an MIM (metal-insulator-metal) capacitor, and to a method of manufacturing the semiconductor device.
2. Description of the Related Art
In recent years, with advances in communication techniques, an increasing number of personal computers (PCs) and personal digital assistants (PDAs) have been connected to networks and used thereby. Also home-use electrical appliances (such as video decks, refrigerators, and air conditioners) are predicted to be connected to networks and to thereby be used in the future.
To configure a network with a large number of such devices as described above, a networking method used in, for example, offices in such a manner that LAN (local area network) cables are routed between individual devices is not suitable for use in ordinary homes, and it is considered that wireless connection using wireless services will be employed as mainstream connection in the future. As such, in the future, it is considered most LSI chips will have RF (radio frequency) communication functions added.
Conventionally, an LSI of the aforementioned type is formed of a plurality of chips, such as chips of RF analog devices (such as SiGe-BiCMOSs) and chips of CMOS logic devices. For PDAs and the like, miniaturization is viewed as important, and the LSI is demanded to be miniaturized using an RF-embedded LSI. In the RF-embedded LSI, an RF analog device and a CMOS logic device are integrated into a single chip.
To integrate the RF analog device and the CMOS logic device into a single chip, manufacturing processes for the two devices need to be integrated. The RF analog device is configured from, for example, resistors, inductances, and capacitors. The CMOS logic device is configured from a plurality of MOS transistors. As such, to realize the RF-embedded LSI, for example, a process for the RF analog device needs to be integrated with a CMOS logic process set as a base, and a new RF-CMOS process needs to thereby be developed.
In integration of the two processes, problems first arise regarding an MIM capacitor structure and the process thereof. The reasons for this are described hereunder.
One of a feature of the MIM capacitor for the RF analog device in the RF-embedded LSI is the capacitor area is as large as several hundred square microns. As such, increasing the capacitor capacitance per unit area is very important for decreasing the chip size and for increasing Q values of circuits.
In addition, good pairability is required for MIM capacitors for the RF analog device for the reason described hereunder. The RF analog circuit includes an arithmetic circuit that obtains output differentials by using symmetric circuits. In this configuration, capacitors used in pairs in the arithmetic circuit are required to match one another in capacitance and responsibility with very high accuracy.
Conventionally, in order to increase the capacitance density of an MIM capacitor having a large area, a technique is used for a capacitor of a DRAM in which an electrode is three-dimensionally structured, and the side wall area of the capacitor is thereby increased. However, the method is not effective for the reasons described hereunder.
An area (S1) of a DRAM capacitor in a top view is very small. As such, in the case where an electrode is three-dimensionally structured to increase a side wall area (S2), the ratio of S2/S1 increases to be very high. For this reason, for the DRAM capacitor, the capacitance density can easily be increased by three-dimensionally structured the electrode.
However, compared with the DRAM capacitor, the capacitor used for the RF-embedded LSI has a very large area S1. As such, even when S2 is enlarged to a certain extent, the ratio of S2/S1 is not increased so much. Suppose the ratio of S2/S1 is to be sufficiently increased in the simple way that the electrode is formed columnar. In this case, the electrode needs to be as tall as several tens of microns. However, such a tall electrode is impractical.
To increase S2 without using such a tall electrode, a technique for forming a large number of fine raggedness portions on sidewalls of an electrode. However, when such an electrode having such an intricate shape, it is difficult to realize an MIM capacitor having good pairability.
Another conceivable technique for increasing the capacitance density without forming the three-dimensional electrode structure is that a high-permittivity material, such as tantalum oxide (Ta2O5) niobium oxide (Nb2O5), or barium titanate is used instead of conventionally used silicon nitride as a material for the dielectric film of the MIM capacitor. (The high-permittivity material is disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication Nos. 2000-183289 and 2000-208720.)